JPH0422021B2 - - Google Patents

Info

Publication number
JPH0422021B2
JPH0422021B2 JP56170027A JP17002781A JPH0422021B2 JP H0422021 B2 JPH0422021 B2 JP H0422021B2 JP 56170027 A JP56170027 A JP 56170027A JP 17002781 A JP17002781 A JP 17002781A JP H0422021 B2 JPH0422021 B2 JP H0422021B2
Authority
JP
Japan
Prior art keywords
film
etching
substrate
groove
sio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56170027A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5871638A (ja
Inventor
Tokuo Kure
Yoichi Tamaoki
Takeo Shiba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP17002781A priority Critical patent/JPS5871638A/ja
Publication of JPS5871638A publication Critical patent/JPS5871638A/ja
Publication of JPH0422021B2 publication Critical patent/JPH0422021B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Drying Of Semiconductors (AREA)
  • Element Separation (AREA)
JP17002781A 1981-10-26 1981-10-26 エツチング方法 Granted JPS5871638A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17002781A JPS5871638A (ja) 1981-10-26 1981-10-26 エツチング方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17002781A JPS5871638A (ja) 1981-10-26 1981-10-26 エツチング方法

Publications (2)

Publication Number Publication Date
JPS5871638A JPS5871638A (ja) 1983-04-28
JPH0422021B2 true JPH0422021B2 (en]) 1992-04-15

Family

ID=15897238

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17002781A Granted JPS5871638A (ja) 1981-10-26 1981-10-26 エツチング方法

Country Status (1)

Country Link
JP (1) JPS5871638A (en])

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3242113A1 (de) * 1982-11-13 1984-05-24 Ibm Deutschland Gmbh, 7000 Stuttgart Verfahren zur herstellung einer duennen dielektrischen isolation in einem siliciumhalbleiterkoerper
JPS60241231A (ja) * 1984-05-15 1985-11-30 Nippon Telegr & Teleph Corp <Ntt> 半導体集積回路装置の製法
US5004703A (en) * 1989-07-21 1991-04-02 Motorola Multiple trench semiconductor structure method
US5256592A (en) * 1989-10-20 1993-10-26 Oki Electric Industry Co., Ltd. Method for fabricating a semiconductor integrated circuit device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4209349A (en) * 1978-11-03 1980-06-24 International Business Machines Corporation Method for forming a narrow dimensioned mask opening on a silicon body utilizing reactive ion etching

Also Published As

Publication number Publication date
JPS5871638A (ja) 1983-04-28

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